CMSIS-CORE  Version 3.30
CMSIS-CORE support for Cortex-M processor-based devices
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Overview

CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:

  • Hardware Abstraction Layer (HAL) for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.
  • System exception names to interface to system exceptions without having compatibility issues.
  • Methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.
  • Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.
  • Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.
  • A variable to determine the system clock frequency which simplifies the setup the SysTick timer.

This chapter provides details about the CMSIS-CORE and contains the following sections:


Cortex-M Reference Manuals

The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.


Tested and Verified Toolchains

The CMSIS-CORE Template Files supplied by ARM have been tested and verified with the following toolchains:

  • ARM: MDK-ARM Version 5.10
  • GNU: GNU Tools ARM Embedded 4.7 2013.q3
  • GNU: Sourcery G++ Lite Edition for ARM 2011.03-42
  • IAR: IAR Embedded Workbench Kickstart Edition V6.10

Revision History of CMSIS-CORE

Version Description
V3.30 Added: COSMIC tool chain support.
Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4.
Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4.
Corrected: GCC/CLang warnings.
Integration of CMSIS DSP Library version 1.4.2
V3.20 Added: __BKPT instruction intrinsic.
Added: __SMMLA instruction intrinsic for Cortex-M4.
Corrected: ITM_SendChar.
Corrected: __enable_irq, __disable_irq and inline assembly for GCC Compiler.
Corrected: NVIC_GetPriority and VTOR_TBLOFF for Cortex-M0/M0+, SC000. Corrected: rework of in-line assembly functions to remove potential compiler warnings.
V3.01 Added support for Cortex-M0+ processor.
Integration of CMSIS DSP Library version 1.1.0
V3.00 Added support for GNU GCC ARM Embedded Compiler.
Added function __ROR.
Added Register Mapping for TPIU, DWT.
Added support for SC000 and SC300 processors.
Corrected ITM_SendChar function.
Corrected the functions __STREXB, __STREXH, __STREXW for the GNU GCC compiler section.
Documentation restructured.
V2.10 Updated documentation.
Updated CMSIS core include files.
Changed CMSIS/Device folder structure.
Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library.
Reworked CMSIS DSP library examples.
V2.00 Added support for Cortex-M4 processor.
V1.30 Reworked Startup Concept.
Added additional Debug Functionality.
Changed folder structure.
Added doxygen comments.
Added definitions for bit.
V1.01 Added support for Cortex-M0 processor.
V1.01 Added intrinsic functions for __LDREXB, __LDREXH, __LDREXW, __STREXB, __STREXH, __STREXW, and __CLREX
V1.00 Initial Release for Cortex-M3 processor.